1. Field of the Invention
This invention relates to the field of multiprocessing systems having two or more processing elements. More specifically, it relates to mechanisms for providing processor affinity to a task requiring a feature installed on fewer than all processors in a processor complex.
2. Background Art
In tightly coupled multiprocessor systems, comprising two or more processing elements, a user program may execute for an interval on a first processing element, then be interrupted, or suspended (perhaps to await I/O completion), and subsequently be redispatched on another processing element. In a symmetric process complex each processing element has identical features, so that a task may normally be dispatched on whatever processing element is desired to accommodate system-wide goals (e.g., load balancing). However, in an asymmetric complex, a feature available on one processing element may not exist on another processing element.
An early solution to this problem on operating systems such as IBM's MVS/SP was to introduce the concept of task affinity. Using a "program properties table", it was possible to identify a program as having affinity to (or needing to be run on) a particular processing element of the complex, where a needed feature was known to exist. A disadvantage of this approach is that the program is restricted to a particular processing element for its entire execution, while it is possible that the asymmetric feature may only be needed for a short while. In this event, the affinity may prove unnecessarily restrictive (e.g., a processing element may be idle while the program (possibly no longer needing the asymmetric feature) waits for an element having the feature - which element may be out of service.)
A refinement to the "permanent" affinity of the program properties table is described in U.S. Pat. No. 4,809,157 to J. H. Eilert, et al. (issued Feb. 28, 1989 and assigned to the assignee of the present invention). Here a more limited affinity, termed "vector affinity", is described. With vector affinity, a program can execute without affinity to a particular processing element until a need for an asymmetric feature is demonstrated by executing a special instruction requiring the feature. Execution of the special instruction on a processing element without the feature results in an interruption of the program, and a redispatch of the program on the processing element having the feature. The program will now have restrictive affinity until it goes without needing the feature for a fixed time interval--after which a separate routine removes the affinity.
A number of problems remain even in this vector affinity situation. First, it is possible that a program having affinity to a particular processing element may remain enqueued while the needed processing element executes a program which could just as well have run on another processing element. This could result in unnecessary system underutilization. Second, vector affinity requires an overt act to remove the restrictive affinity. This may be wasteful in a case where the affinity is only needed to execute a single instruction.
A related invention, "Process for Dispatching Tasks Among Multiple Information Processors", is described in U.S. Pat. application Ser. No. 07/531,178, by J. E. Bahr, et al., filed May 31, 1990, and assigned to the assignee of the present invention, describes a technique in which a centralized allocation routine scans ready work a number of times, picking work with an affinity to a particular processing element ahead of work without such an affinity, and analyzing work priority in making the assignments. This solution relies on having a centralized routine making the work allocation, whereas an MP environment such as IBM's MVS/ESA supports a dispatcher executing on any processing element--more than one possibly executing in parallel--selecting work from a central queue. The just referenced application is similar to the vector affinity invention in requiring an overt act (executing a reset instruction) to remove the affinity.
Therefore it is an object of the present invention to provide a transient affinity for a program to a particular processing element, with the transient (short-duration) affinity vanishing without a trace after the redispatch of the program on the appropriate processing element.
It is a further object of this invention to provide a transient affinity mechanism that will provide a reduced likelihood that work having this affinity will be unnecessarily delayed by work not having an affinity for the processing element.
It is a further object of this invention to provide an efficient means for quickly redispatching a work unit with transient affinity on an appropriate processor.
It is a further object of this invention to provide an efficient means for dispatching work units requiring an asymmetric feature on the processor having that feature, without interrogation by other processors, and without adverse impact to other work units in the same address space that do not require the feature.